Рақамли технологияларнинг назарий ва амалий масалалари 7-том 3-нөмір (2024) · 105-111-беттер
Improvement of hardware implementation of S tables based on factoring
Ганиев, С.К., Худойкулов, З.Т.
Аңдатпа
While non-linear S-tables are important in the security of symmetric cryptosystems, their hardware implementation also requires a large number of logic elements compared to the rest of the mappings. This makes it necessary to reduce the number of required logic elements in the hardware implementation of S tables. In practice, SAT solver, K-map, and Quine-McCluskey algorithms are used to solve these problems. In this paper, the problem of compactification by factorization of logical functions obtained from K-map and Quine-McCluskey algorithms is solved. 4×4 and 5×5 bit S tables were analyzed using the proposed algorithm as a solution to the problem. The results of the analysis showed that the number of OR and AND operations involved in logical functions as a result of factoring after K-map reflection decreased by 23.51% on average for 4×4 bit S tables. The number of OR and AND operations involved in logical functions as a result of factoring after the QuineMcCluskey algorithm was 23 and showed a decrease of 24%. This indicator was equal to 30.29% in the case of K-map mapping and 30.48% in the case of the QuineMcCluskey algorithm for 5x5-bit S-tables.
Таблица SLUT (таблица поиска)сумма произведений («сумма продуктов», SOP)произведение сумм («произведение сумм», POS)K-mapQuine-McCluskeyфакторингрешатель SATS tableLUT (lookup table)
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